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 BU2505FV
Optical disc ICs
10bit 10-channel D/A converter
BU2505FV
BU2505FV is a high-performance 10bit D/A converter IC that incorporates 10-channel of a R-2R system. Each channel output incorporates a Rail-to Rail output type output with buffer amplifier. This IC utilizes the TTL level input method. RESET pin can keep the output voltage in the lower reference voltage range. REVERSE pin can change the LSB/MSB of 10bit data. Small package (0.65mm pitch and 20pin) is adopted.
Applications DVD, CD-R, CD-RW, DVC, Digital camera, and other industrial equipments
Features 1) High-performance 10bit D/A converter that incorporates 10-channel of a R-2R system. 2) RESET pin can keep output voltage of all channels within the lower reference voltage range. 3) Digital input compatible with TTL levels. 4) 14bit 3wire serial data + RESET signal input, and cascade connection is possible. LSB first / MSB first of 10bit data can be changed by REVERSE pin.
Absolute maximum ratings (Ta=25C)
Parameter Supply voltage Symbol VCC VDD Limits -0.3~+6.0 -0.3~+6.0 -0.3~+6.0 -0.3~+6.0 400
Unit V V V V mW
Upper reference voltage of D/A converter Input voltage
Output voltage Power dissipation Operating temperature Storage temperature
VIN VOUT
Pd Topr Tstg
-25~+85 -55~+125
C C
Reduced by 4mW for each increase in Ta of 1C over 25C.
Recommended operating conditions (Ta=25C)
Parameter Supply voltage Symbol VCC Min. 4.5 Typ. - Max. 5.5 Unit V
1/3
BU2505FV
Optical disc ICs
Block diagram
GND
AO2
AO1
DI
CLK
LD
Do
AO10
AO9
VCC
20
19
18
17
16
15
14
13
12
11
14bit Shift register 10bit R-2R D/A converter D/A D0 1 2 3 4 5 6 7 8 9 D10 1112 13 D/A D/A
ch2
10bit Latch
1
L Address Decoder
10
L
9
L
10bit Latch
L
L
L
L
L
ch3
10bit R-2R D/A converter Buffer Operational Amplifier
4
D/A
5
D/A
6
D/A
7
D/A
8
D/A
1
VSS (VrefL)
2
AO3
3
AO4
4
AO5
5
Reverse
6
Reset
7
AO6
8
AO7
9
AO8
10
VDD (VrefH)
2/3
BU2505FV
Optical disc ICs
Pin descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Pin name VSS AO3 AO4 AO5 Reverse Reset AO6 AO7 AO8 VDD VCC AO9 AO10 D0 LD Analog / Digital Analog Analog Analog Analog Digital Digital Analog Analog Analog Analog - Analog Analog Digital Digital I/O - O O O I I O O O - - O O O I Function D/A converter lower reference voltage input terminal 10bit D/A converter output terminal (CH3) 10bit D/A converter output terminal (CH4) 10bit D/A converter output terminal (CH5) It is inverted about the data designation 10bit LSB and MSB. The analog output of all channels is fixed for "L". 10bit D/A converter output terminal (CH6) 10bit D/A converter output terminal (CH7) 10bit D/A converter output terminal (CH8) D/A converter upper reference voltage input terminal Power supply terminal 10bit D/A converter output terminal (CH9) 10bit D/A converter output terminal (CH10) Terminal to output LSB data of 14-bit shift register When H-level signal is input to this terminal, the value stored in 14-bit shift register is loaded in decoder and D/A converter output register. Shift clock input terminal. Input signal at DI pin is input to 14-bit shift register at rise of shift clock pulse Serial data input terminal to input 14-bit long serial data 10bit D/A converter output terminal (CH1) 10bit D/A converter output terminal (CH2) GND terminal Equivalent Circuit 6 4 4 4 2 2 4 4 4 5 - 4 4 3 1
16 17 18 19 20
CLK DI AO1 AO2 GND
Digital Digital Analog Analog -
I I O O -
1 1 4 4 -
External dimensions (Unit : mm)
6.50.2
6.40.3 1.150.1 4.40.2 0.1 0.3Min.
20 11
1
10
0.150.1 0.1
0.65 0.220.1
SSOP-B20
3/3
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.
Appendix1-Rev1.0


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